PCB designer and embedded systems engineer with a focus on IoT, RF, and power electronics.
I'm a Computer Engineering student at Cal Poly Pomona (GPA 3.5, graduating May 2026) with a deep passion for embedded systems, PCB design, and the intersection of hardware and software.
I enjoy designing multi-layer circuit boards. My work spans IoT platforms, wearables, and smart-city infrastructure.
Currently completing my Autonomous Vehicle Infrastructure Mesh Network senior design project — building low-power nodes with LoRa, GPS, and cellular uplink for scalable roadside deployments.
Click any card to explore details & add photos
Custom low-power PCB nodes with GPS, LoRa, and cellular uplink for scalable smart-city deployments — with self-healing mesh protocol, Jetson Orin cloud anomaly detection, and real-time topology visualization.
Custom 2-layer flex PCB wearable with step tracking, heart rate sensing, and BMR estimation — paired with a companion mobile app for biometric visualization.
Environmental monitoring system on PIC18F with TFT display (SPI), PWM cooling, interrupt-driven firmware, and I2C RTC synchronization. Validated with oscilloscope and logic analyzer.
2-layer PCB optimized for ground return paths and low noise, validated with 100+ bench tests. ESP-32 controller with analog inputs, battery management, and 1ms-response C++ firmware.
I'm open to internships, new grad roles, and collaborative hardware projects. Feel free to reach out — I'd love to connect.